ARM Cortex M3 CPU core with 512/1024 kB flash and 128 kB RAM

 Best-in-class RF performance with VC7000 sub-GHz RF transceiver

 AES-128/192/256 Crypto Accelerator

 Ultra-low power wireless SoC

• RX mode: 18 mA
• TX mode: 45 mA@+13 dBm, 110 mA@+20 dBm
• Sleep mode:
• VC7300A: 2.5 uA
• VC7300B: 9 uA~10 uA
• Deep sleep mode: Less than 1.1 uA

 MCU

• 32-bit Cortex M3 with maximum 39.3126 MHz operation speed
• Single cycle multiplier
• Standard 2-wires SWD debug interface
• 512/1024 KB Flash with write protect, support both IAP and ISP
• 128 KB SRAM with parity check and data retention under sleep mode
• 16 KB SRAM with data retention under deep-sleep mode
• Support abort exception detection including Flash check-sum error, SRAM parity error, memory address error and memory align error
• Support boot from embedded flash or boot from internal ROM with IO strap option

 Interface Controller

• Support SPI flash and SPI SRAM for program execution and directly data read/write
• 4 UART controllers with parity check and transmit/receive FIFOs
• Each IR channel can be coupled with IR carrier for IR transmission
• 1 SPI master/slave controllers
• 1 I2C master/slave controller
• 4 32-bit timers
• 4 16-bit PWM timers

• 4-channels DMA controller
• 128/192/256 bits AES CODEC
• ECC encrypt/decrypt accelerated engine
• Watch dog timers with programmable period
• Support multiple wake-up sources under each mode
• Maximum 35 GPIOs
• 11 GPIOs can be external interrupt and wakeup sources under all modes
• Support key scan controller which can support up to 16 keys with 4x4 matrix

 Analog Controller

• 10-bit ADC with 1 Msps and 6 external inputs
• ADC supports manual sample mode or auto sample mode
• 1 comparator with single end input or differential input
• Embedded 32 KHz and 39.2166 MHz RCO
• Support external 32 KHz crystal
• Support crystal absent detect for 32KHz
• Each clock can be selected to be system clock
• Support digital clock divider up-to 1/256
• Support low voltage detection with programmable level
• Support power-on reset for both IO voltage and core voltage
• Support 1 ppm RTC auto-calibration under deep-sleep mode

 Support IEEE 802.15.4g/Wi-SUN

 Support wireless M-Bus

 ISM Frequency bands: 315, 433, 490, 868, 915 MHz

 Excellent selectivity performance

• Adjacent channel rejection: 48 dB
• Blocking performance: > 75 dB

 Best-in-class receiver sensitivity

• -109 dBm at 50 kbps GFSK

 Maximum data rate: 300 kbps

 Configurable maximum transmit output power :

• +20 dBm
• +13 dBm

 Automatic output power ramping

 Modulation schemes: OOK, (G)FSK, 4(G)FSK and GMSK

 Automatic RX wake-up for low power listen

 Fast wake-up and AGC for low-power listen

 Functions for wireless link robustness

• RF channel hopping
• Retransmission
• Auto-acknowledgement

 Digital RSSI and clear channel assessment for CSMA and listen-before-talk systems

 Support packet over packet reception for reliable communication

 Early termination of receive mode for incorrect preamble reception

 Hardware-based user identification listen to eliminate false wake-up

 Operating Voltage: 2.0 V ~ 3.6 V

 Package: QFN-64 (9 x 9mm)

 Operation Temperature: -40 ~ +85 °C